A radiation-hardened processor designed to give spacecraft up to 100 times the computational capacity of current spaceflight computers is undergoing a test campaign aimed at enabling autonomous AI onboard future missions.
NASA’s Jet Propulsion Laboratory (JPL) began testing the High Performance Spaceflight Computing (HPSC) processor in February. The chip is intended to allow spacecraft to use artificial intelligence (AI) to respond in real time to complex situations where human input is not possible.
The test campaign covers radiation, thermal and shock exposure alongside a functional test program designed to validate performance against the conditions of deep space. High-energy particles from the Sun and interstellar space can trigger errors that force a spacecraft into safe mode, suspending non-essential operations until mission operators intervene.
“We are putting these new chips through the wringer by carrying out radiation, thermal, and shock tests while also evaluating their performance through a rigorous functional test campaign,” said Jim Butler, HPSC project manager at JPL.
Early results indicate the processor is operating at 500 times the performance of the radiation-hardened chips currently used in spaceflight, according to NASA. The agency reports the device is working as designed across the test programme to date.
JPL is also using high-fidelity landing scenarios drawn from previous NASA missions to evaluate the chip against tasks that would typically demand power-intensive hardware to process landing-sensor data.
“To simulate real-world performance, we are using high-fidelity landing scenarios from real NASA missions that would typically require power-intensive hardware to process huge volumes of landing-sensor data,” said Butler. “This is an exciting time for us to be working on hardware that will enable NASA’s next giant leaps.”
Built by Microchip Technology, which is headquartered in Chandler, Arizona, the processor is a system-on-a-chip (SoC) small enough to fit in the palm of a hand. It integrates central processing units, computational offloads, advanced networking units, memory and input/output interfaces in a single energy-efficient package.
“Building on the legacy of previous space processors, this new multicore system is fault-tolerant, flexible, and extremely high-performing,” said Eugene Schwanbeck, program element manager in NASA’s Game Changing Development program at Langley Research Center in Hampton, Virginia.
Beyond AI autonomy, the chip is intended to accelerate onboard data analysis on deep-space missions and support future crewed missions to the Moon and Mars. Once certified for spaceflight, NASA plans to incorporate the processor into Earth orbiters, planetary rovers, crewed habitats and deep-space spacecraft.
Testing at JPL will continue for several months. Microchip is also adapting the technology for Earth-based applications including aviation and automotive manufacturing.
